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01:40.21 | m4t | gpsfan, you around? i got a quick question about the 'error' loop on the wiggler jtag |
01:41.10 | GPSFan | m4t: ask away... |
01:42.20 | m4t | i think the loop between the two pins on the db25 is so openocd will recognize the cable as attached |
01:42.38 | m4t | what im wondering, is if i would be able to throw an led in the loop to give me a status/power led |
01:43.07 | m4t | http://www.elinux.org/images/0/05/Dht-walnut-ppc405-wiggler.png |
01:43.18 | m4t | is what im building (well, built actually) |
01:45.34 | m4t | this one is rated 12vdc/15mA/25mcd |
01:45.44 | m4t | 680ohm |
01:47.39 | GPSFan | m4t: I think you are right about the "loop" being used to detect the presence of the jtag adapter. whether it would sitll wrok with a led in the circuit is up for dabate. I's suggest just trying it, maybe poke at the signals with a scope while in operation. |
01:48.20 | m4t | i wonder if a relay would work better, with power coming from another source |
01:49.31 | m4t | also, any idea what d7 is? |
01:50.17 | m4t | ground to the plug chassis? |
01:51.28 | GPSFan | probably not, d7 is an I/O pin from the parallel port don't want to ground it if it is set to output. |
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02:14.53 | m4t | cool, thanks |
02:15.01 | m4t | is splitting idc 16pin |
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08:02.31 | methril|work | yo |
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12:40.31 | mnemoc | wmat: yes, confirmation finished successfully, thanks! |
13:44.47 | wmat | mnemoc: that's great. |
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23:08.28 | igor47 | how do i force a rebuilt of the root using buildroot? i want it to recreate the project_build/myproject/root folder using all the already-compiled utils, but if i remove the .root and the existing root not all the utilities make it |
23:08.36 | igor47 | when i just do make |